GENIO 510 - How to set CSI port polarity swap for data lanes and clock lane

Yocto
1

Hello,

we want to swap the polarity of the camera CSI port for all data lanes and the clock lane.

Are there any methods (device tree or hardware registers) do to so ?

regards

Michael

3

Hi @Michael_Steinel ,

To clarify, are you asking about the flexibility of re-assigning the MIPI-CSI lane order, such as switching between clock and data lanes? If so, could you please share the motivation behind this?

According to the Hardware Design Notice, the lane mapping is defined based on the operating mode (DPHY/CPHY and Normal/Split). Currently, only the Normal mode is supported. You can find the detailed pin-to-signal mapping table in the document MT8370 Application Processor Schematic and PCB Design Notice.

For your immediate reference, here is the relevant snippet:

CSI# Pad Name DPHY Normal (4-lane)
CSI-0 CSI0A_L0P_T0A RDP2
4D CSI0A_L0N_T0B RDN2
CSI0A_L1P_T0C RDP0
CSI0A_L1N_T1A RDN0
CSI0A_L2P_T1B RCP
CSI0A_L2N_T1C RCN
CSI0B_L0P_T0A RDP1
CSI0B_L0N_T0B RDN1
CSI0B_L1P_T0C RDP3
CSI0B_L1N_T1A RDN3
CSI0B_L2P_T1B N/A
CSI0B_L2N_T1C N/A

Thanks